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Hasan Maruf
Hasan Al Maruf is a Software Engineer in Meta's Systems ML — SW/HW Co-Design team, where he works on enabling production CXL memory infrastructure. He earned his Ph.D. in Computer Science from the University of Michigan on Practical Memory Disaggregation, and is one of the pioneering researchers behind CXL-based Tiered Memory– author of TPP, the in-kernel page-placement mechanism that became the de-facto industry standard for datacenter memory tiering. His research spans disaggregated and tiered memory, near-memory computation, and hardware-software co-design, recognized with a USENIX ATC Best Paper Award and an IEEE Micro Top Picks selection. He previously served as a Server Systems Architect at AMD, guiding next-generation EPYC and CXL enablement.
Sessions
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Boost your AI performance with CXL16-Sep-2026Expo Theater 1