Vinay Gangadhar

Vinay Gangadhar is a Principal AI Hardware Architect in the AI Systems & Architecture group at Microsoft, where he leads architecture pathfinding for next-generation MAIA accelerator solutions for large-scale LLM inference. His work spans workload-driven architecture exploration, performance modeling, HW–SW co-design, memory-centric systems, and datacenter-scale AI infrastructure, with a recent focus on addressing the growing memory and data-movement bottlenecks in modern AI workloads.

He has close to a decade of experience in computer architecture and in building novel AI hardware solutions, spanning accelerator architecture, memory systems, SoC design, and end-to-end system optimization. Previously, he was a lead architect at SimpleMachines, driving an AI accelerator from architectural definition through product realization, and later contributed to accelerator and SoC architecture at Cerebras Systems and Rivos.

Vinay holds a Ph.D. in Electrical and Computer Engineering from the University of Wisconsin–Madison, where his research focused on programmable accelerators, open-source GPGPUs, and dataflow architectures. He holds multiple granted patents and has published in leading computer architecture venues.