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26 Aug 2026
Why SoC Interconnects Have Outgrown the Bus: The NoC-Centric, CHI-Native Path Forward
This paper covers four forces driving the shift:
→ AI and ML workloads demanding heterogeneous coherency that broadcast-snoop fabrics simply cannot scale to
→ ISO 26262 ASIL-B through ASIL-D requirements that legacy interconnects were never built to carry → Chiplet disaggregation through UCIe 2.0 — coherency must now cross die boundaries
→ Advanced-node wire delay, where crossbar arbitration paths are already failing to close at 3nm and 2nm
We walk through why CHI Issue E.b's layered architecture and directory-based coherency are the structural answers to each of these — and how SignatureIP's NoC portfolio (C-NOC, NC-NOC, AXI2CHI, CHI2AXI, ATC, Proxy Cache, Ethernet, and Inoculator) is built for this exact transition.
→ AI and ML workloads demanding heterogeneous coherency that broadcast-snoop fabrics simply cannot scale to
→ ISO 26262 ASIL-B through ASIL-D requirements that legacy interconnects were never built to carry → Chiplet disaggregation through UCIe 2.0 — coherency must now cross die boundaries
→ Advanced-node wire delay, where crossbar arbitration paths are already failing to close at 3nm and 2nm
We walk through why CHI Issue E.b's layered architecture and directory-based coherency are the structural answers to each of these — and how SignatureIP's NoC portfolio (C-NOC, NC-NOC, AXI2CHI, CHI2AXI, ATC, Proxy Cache, Ethernet, and Inoculator) is built for this exact transition.