EXPAND YOUR DATA INFRA NETWORK
Connect with leading architects, engineers, and infrastructure providers focused on novel memory design approaches, optimized storage performance, and high-speed interconnects in AI systems.
The data movement track is designed for the technologists building groundbreaking solutions to overcome AI data bottlenecks.
Explore the technical design hub of the AI Infra Summit, with deep dives from those creating novel memory approaches, high performance interconnect architectures, and blisteringly fast storage solutions.
For systems, memory, storage, and networking engineers and architects helping data transfer reach the speed of light.
Connect with leading architects, engineers, and infrastructure providers focused on novel memory design approaches, optimized storage performance, and high-speed interconnects in AI systems.
Review architectural strategies and product developments aimed at reducing data transfer bottlenecks from those building hyperscale systems.
Examine how end users are addressing bottlenecks across memory, storage, and networking in real-world AI deployments, including performance trade-offs and operational considerations.
Download the One Pager
Sessions focus on:
Interconnect limits in AI clusters, including scale-up vs scale-out trade-offs and where systems break first
The shift to co-packaged optics and next-gen switching for AI factories
The AI memory wall, including HBM constraints and memory hierarchy design
How storage architectures are evolving for inference workloads
You’ll gain practical insights into how to:
Improve GPU utilisation and reduce idle compute
Optimise data pipelines between storage, memory, and compute
Reduce latency in distributed training and inference
Rethink system architecture for AI-scale workloads